ASIC DFT Engineer, Silicon

Google's Devices & Services team is seeking an ASIC DFT Engineer to join their innovative hardware development team. This role is part of a diverse team that pushes boundaries in developing custom silicon solutions powering Google's direct-to-consumer products. The position offers an opportunity to work on cutting-edge hardware experiences that impact millions of users worldwide.

The role involves working closely with RTL and Physical Designer Engineers to develop and implement DFT (Design for Testability) solutions. You'll be responsible for creating subsystem level DFT SCAN and MBIST Architecture implementations, handling multiple voltage and power domains. The position requires strong scripting abilities to automate DFT flows and develop production-ready tests for ATE flow.

As part of Google's mission to organize world's information and make it universally accessible, you'll be contributing to the Devices & Services team that combines the best of Google AI, Software, and Hardware. The team focuses on creating radically helpful experiences through research, design, and development of new technologies and hardware.

The ideal candidate should have a strong foundation in Electrical Engineering or Computer Science, with experience in DFT flows and methodology. Proficiency in scripting languages, particularly Python and TCL, is essential. This role offers the opportunity to shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Working at Google, you'll be part of a company that values diversity, equality, and inclusion. The company is committed to building a workforce representative of its users and creating a culture of belonging. This role provides an excellent opportunity to work on innovative hardware solutions while being part of a supportive and inclusive work environment.