Chip Package Signal and Power Integrity Engineer

Google is seeking a Chip Package Signal and Power Integrity Engineer to join their Technical Infrastructure team. This role is crucial in developing custom silicon solutions that power Google's direct-to-consumer products. The engineer will be responsible for chip package design with signal/power integrity simulation and characterization at the chip, package, and system level.

The ideal candidate will have a strong background in Electrical Engineering or related fields, with at least 5 years of industry experience in SI/PI. They will work closely with Chip Architects, ASIC Engineers, and other SI/PI Engineers to drive chip packaging signal and power implementations from product planning to New Product Introduction (NPI).

Key responsibilities include contributing to chip-package-system co-design, developing next-generation IO interfaces, collaborating with various teams to optimize chip performance, and conducting post-silicon validation. The role requires expertise in advanced package design, including 2.5D/3D package technology, and the ability to work cross-functionally with chip design, system design, and software teams.

Google offers a competitive salary range of $150,000-$223,000, plus bonus, equity, and benefits. The company is committed to diversity and inclusion, providing equal employment opportunities to all candidates. This position offers a unique opportunity to shape the future of Google's hardware experiences, delivering unparalleled performance, efficiency, and integration in products used by millions worldwide.