Chiplet Technologist and Design Integration Technical Lead, Silicon

Google is seeking a Chiplet Technologist and Design Integration Technical Lead to join their Silicon team. This role focuses on developing high-performance and low-power hardware for Google's mobile device innovations. The position requires extensive experience in front-end design, SERDES IP integration, and chiplet technologies.

As a technical lead, you'll be responsible for selecting and integrating Chiplet technologies, along with other IO interface and design IPs. You'll develop strategies for successful micro-architecture design, integration, verification, and post-Silicon debug. The role involves working with industry vendors, developing integration plans for new technologies, and ensuring successful execution from IP sourcing to final post-silicon verification.

The ideal candidate should have at least 8 years of experience in front-end design, with strong expertise in SERDES IP integration, standard bus protocols, and SoC tapeout experience. Knowledge of pre-silicon to post-silicon execution, multiple foundries PDK design, and excellent communication skills are essential.

Google offers a competitive compensation package, including a base salary range of $177,000-$266,000, plus bonus, equity, and comprehensive benefits. The company is committed to creating an inclusive environment and values diversity in its workforce. This role provides an opportunity to work with cutting-edge technology and contribute to Google's mission of organizing the world's information and making it universally accessible and useful.

Join Google's extraordinarily creative and talented team to develop new products used by millions of people. If you're passionate about building new things and working across discipline lines, this role could be your next career step in helping create radically helpful experiences through the combination of Google AI, Software, and Hardware.