CPU Design Verification Engineer
Description For CPU Design Verification Engineer
Google Cloud is seeking a CPU Design Verification Engineer to join their Technical Infrastructure team. This role is crucial in developing custom silicon solutions that power Google's direct-to-consumer products. As part of the server chip design team, you'll work on verification of digital designs, building efficient constrained-random verification environments, and managing the full lifecycle of verification processes.
The position offers an opportunity to work with cutting-edge technology in Google's data centers and platforms. You'll be part of a diverse team that pushes boundaries in hardware innovation, working closely with design and verification engineers on projects that directly impact Google's product portfolio. Your work will involve sophisticated verification planning, test execution, and coverage closure.
The ideal candidate should have strong experience in digital logic verification, particularly with SystemVerilog or Specman/E for FPGAs or ASICs. Knowledge of standard IP components and verification methodologies is essential. Experience with UVM and scripting languages like Python is highly valued. This role combines technical expertise with collaborative teamwork, offering the chance to contribute to next-generation hardware experiences that deliver unparalleled performance and efficiency.
Working at Google means joining a company committed to innovation and inclusive workplace culture. You'll have the opportunity to work on projects that impact millions of users while being part of a team that values technical excellence and creative problem-solving. The role offers the chance to work in either Tel Aviv or Haifa, Israel, contributing to Google's global technical infrastructure.
Responsibilities For CPU Design Verification Engineer
- Plan the verification of digital design blocks by understanding design specification and interacting with design engineers
- Create and enhance constrained-random verification environments using SystemVerilog/UVM, or Specman
- Identify and write all types of coverage measures for stimulus and corner-cases
- Debug tests with design engineers to deliver functionally correct design blocks
- Lead coverage measures to identify verification holes and show progress towards tape-out
Requirements For CPU Design Verification Engineer
- Bachelor's degree in Electrical Engineering or equivalent practical experience
- 3 years of experience verifying digital logic at RTL level using SystemVerilog, or Specman/E for FPGAs or ASICs
- Experience verifying digital systems using standard IP components/interconnects
- Experience creating and using verification components and environments in standard verification methodology
