CPU Formal Verification Engineer
Description For CPU Formal Verification Engineer
Join Google's Technical Infrastructure team as a CPU Formal Verification Engineer, where you'll be part of a diverse team developing custom silicon solutions that power Google's direct-to-consumer products. This role focuses on ensuring the reliability and correctness of hardware designs through formal verification methods.
As a CPU Formal Verification Engineer, you'll work with cutting-edge technology and contribute to the architecture that keeps Google's vast infrastructure running smoothly. You'll be responsible for planning and implementing verification strategies for digital design blocks, using sophisticated formal property verification tools, and developing reusable verification components.
The position requires expertise in hardware verification, particularly with formal methods and temporal assertion languages. You'll work with main interconnects, DMA controllers, and power management systems, ensuring their proper functionality through rigorous verification processes.
This is an excellent opportunity for someone with a strong background in computer engineering who wants to impact products used by millions worldwide. You'll be working at Google's offices in either Tel Aviv or Haifa, Israel, contributing to the next generation of hardware experiences that deliver unparalleled performance, efficiency, and integration.
The role offers the chance to work with industry-leading tools and methodologies, and you'll be part of a team that's proud to be "engineers' engineers." You'll contribute to maintaining and improving Google's data centers and platforms, ensuring users have the best and fastest experience possible.
The ideal candidate should have a bachelor's degree in Electrical Engineering or Computer Science, with preferred qualifications including a master's or PhD. Experience with formal verification tools like JasperGold, VC Formal, Questa Formal, or DV360 is highly valued.
Responsibilities For CPU Formal Verification Engineer
- Plan the formal verification strategy and create the properties and constraints for digital design blocks
- Utilize formal property verification tools combined with formal verification closure techniques to verify properties
- Contribute improvements to methodologies to enhance formal verification results. Resolve difficult to verify properties
- Architect and implement reusable formal verification components
Requirements For CPU Formal Verification Engineer
- Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience
- Experience working in main interconnects, Direct Memory Access (DMA), controllers, and power management
- Experience capturing design specification in a temporal assertion language (e.g., SVA or PSL)
- English proficiency is required
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