Google is seeking a Front End CAD/EDA-Methodology Tool Development Engineer to join their Technical Infrastructure team. This role combines hardware expertise with software development, focusing on developing custom silicon solutions for Google's direct-to-consumer products. The position requires deep knowledge of ASIC chip design and modern EDA tools, with a strong emphasis on implementing AI/ML techniques in chip design methodology.
The role involves working closely with Google's Deepmind team and various chip project teams to standardize methodology and improve chip design processes. You'll be responsible for developing and implementing software automation solutions to address bottlenecks in ASIC and SoC EDA flows, while also leading internal software tools development initiatives.
As part of Google's Technical Infrastructure team, you'll be at the forefront of maintaining and developing the architecture that powers Google's vast product portfolio. The team takes pride in being "engineers' engineers" and focuses on building and maintaining the next generation of Google platforms and data centers.
The ideal candidate will have extensive experience in ASIC chip design, strong programming skills in Python/C++, and a proven track record of deploying new tools and workflows. Knowledge of AI/ML methods for ASIC development is highly valued, as is the ability to communicate complex technical concepts effectively.
This position offers the opportunity to work on projects that have a direct impact on Google's hardware development process and contribute to the innovation behind products used by millions worldwide. You'll be part of a diverse team that pushes boundaries and shapes the next generation of hardware experiences, focusing on delivering unparalleled performance, efficiency, and integration.