Full Chip CAD Physical Design Verification Engineer

Google is seeking a Full Chip CAD Physical Design Verification Engineer to join their Technical Infrastructure team. This role involves developing custom silicon solutions for Google's direct-to-consumer products, contributing to the innovation behind products used by millions worldwide. The ideal candidate will have expertise in Electronic Design Automation (EDA) tools, RTL2GDS flows, and experience in the semiconductor/EDA industry.

Key responsibilities include working with Register-Transfer Level (RTL)-to-Graphic Data Stream (GDS)II flow, implementing complex system-on-chips (SoCs), and utilizing advanced node design techniques. The role requires proficiency in floorplanning, power grid design, and place-and-route methodologies, as well as scripting skills in Synopsis TCL and Python.

This position offers the opportunity to shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. The successful candidate will be part of a diverse team that pushes boundaries and maintains the architecture behind Google's vast online presence.

Google is committed to creating an inclusive work environment and offers equal employment opportunities to all qualified candidates. The company provides accommodations for applicants with special needs and values diversity in its workforce.