Full Chip CAD Physical Design Verification Engineer

Google is seeking a Full Chip CAD Physical Design Verification Engineer to join their Technical Infrastructure team. This role is crucial in developing custom silicon solutions that power Google's direct-to-consumer products. As part of the team, you'll work on the architecture that keeps Google's services running smoothly, from data centers to next-generation platforms.

The position requires expertise in Electronic Design Automation (EDA) tools and RTL2GDS flows, with a focus on implementing large, complex system-on-chips. You'll be working with advanced node design (5nm and below) and utilizing various tools and methodologies including floorplanning, power grid design, and place-and-route techniques.

This is an excellent opportunity for someone with a strong background in semiconductor/EDA industry who wants to make an impact on products used by millions worldwide. You'll be part of a diverse team that pushes boundaries and innovates in hardware development, working on solutions that deliver unparalleled performance, efficiency, and integration.

The role offers the chance to work at one of the world's leading technology companies, with access to cutting-edge technology and the opportunity to solve complex technical challenges. You'll be contributing to the development of Google's hardware infrastructure, ensuring optimal performance and reliability of their systems.

Google provides a collaborative environment where you can grow professionally while working on meaningful projects that directly impact users globally. The company is committed to diversity, equality, and creating a culture of belonging, making it an ideal workplace for innovative engineers who want to make a difference in the technology industry.