Full Chip CAD Physical Design Verification Engineer

Google is seeking a Full Chip CAD Physical Design Verification Engineer to join their Technical Infrastructure team. This role is crucial in developing custom silicon solutions that power Google's direct-to-consumer products. As part of the team, you'll work on the architecture that keeps Google's services running smoothly, from developing and maintaining data centers to building next-generation platforms.

The position requires expertise in Electronic Design Automation (EDA) tools and RTL2GDS flows, with a strong background in semiconductor/EDA industry. You'll be working with advanced node designs (5nm and below) and implementing complex system-on-chips (SoCs). The role involves using industry-standard tools like Cadence and Synopsis, along with programming skills in TCL and Python.

This is an opportunity to impact millions of users worldwide by contributing to Google's hardware experiences. You'll be part of a diverse team that pushes boundaries and innovates in custom silicon solutions. The role offers the chance to work with cutting-edge technology and shape the future of Google's hardware infrastructure.

The ideal candidate will have a strong educational background in Electrical Engineering or Computer Science, with experience in silicon quality and reliability. You'll be working in either Tel Aviv or Haifa, Israel, contributing to Google's global technical infrastructure team. This role combines hardware expertise with software skills, making it perfect for someone passionate about both aspects of technology development.