Junior CPU Design Verification Engineer
Description For Junior CPU Design Verification Engineer
Join Google's Technical Infrastructure team as a Junior CPU Design Verification Engineer, working on cutting-edge custom silicon solutions for Google's direct-to-consumer products. In this role, you'll be part of a diverse R&D team responsible for building verification components, conducting constrained-random testing, system testing, and verification closure. You'll collaborate with design and verification engineers on active projects, verifying complex digital designs for server chip development.
Your responsibilities will span the full lifecycle of verification, from planning and test execution to collecting and closing coverage. You'll work with state-of-the-art tools and methodologies, including SystemVerilog, Universal Verification Methodology (UVM), and formal verification techniques. This position offers the opportunity to shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration for products used by millions worldwide.
As part of Google's commitment to innovation, you'll be at the forefront of developing the architecture that powers Google's vast product portfolio. The role requires a strong background in electrical engineering or computer science, with experience in digital logic verification and familiarity with industry-standard verification methodologies. You'll have the chance to work on challenging projects, push the boundaries of technology, and contribute to the success of Google's hardware initiatives.
Join a team that takes pride in being the "engineers' engineers," working on projects that directly impact user experience and product performance. This role offers excellent growth opportunities and the chance to work with some of the brightest minds in the industry. If you're passionate about hardware verification, have a knack for problem-solving, and want to make a significant impact on Google's future products, this position is an excellent opportunity to kickstart your career in CPU design verification.
Responsibilities For Junior CPU Design Verification Engineer
- Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios
- Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools
- Identify and write all types of coverage measures for stimulus and corner-cases
- Debug tests with design engineers to deliver functionally correct design blocks
- Apply close coverage measures to identify verification holes and to show progress towards tape-out
Requirements For Junior CPU Design Verification Engineer
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- Experience creating and using verification components and environments in standard verification methodology
- Experience verifying digital logic at Register Transfer Level (RTL) level using SystemVerilog or Specman/E for Field Programmable Gate Arrays or ASICs
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