Junior CPU Design Verification Engineer
Description For Junior CPU Design Verification Engineer
Google is seeking a Junior CPU Design Verification Engineer to join their Technical Infrastructure team. This role is part of a diverse R&D team focused on developing custom silicon solutions that power Google's direct-to-consumer products. The position involves working on verification components, constrained-random testing, system testing, and verification closure.
As part of the server chip design team, you'll be responsible for verifying complex digital designs and collaborating with design and verification engineers on active projects. The role encompasses the full lifecycle of verification, from planning to test execution and coverage closure.
The Technical Infrastructure team is crucial in maintaining Google's architecture, developing and maintaining data centers, and building next-generation Google platforms. The team takes pride in being the engineers' engineers and ensures networks run optimally for the best user experience.
This is an excellent opportunity for someone with a strong background in electrical engineering or computer science who wants to work on cutting-edge hardware solutions. You'll be part of a team that pushes boundaries and develops solutions that power products used by millions worldwide. The role offers the chance to work with industry-leading tools and technologies while contributing to Google's hardware innovation.
The position requires expertise in verification methodologies, SystemVerilog, and digital logic verification, with opportunities to work on complex projects that directly impact Google's product portfolio. You'll be joining a collaborative environment where you'll interact regularly with design engineers and contribute to the development of next-generation hardware experiences.
Responsibilities For Junior CPU Design Verification Engineer
- Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers
- Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with SystemVerilog Assertions (SVA)
- Identify and write all types of coverage measures for stimulus and corner-cases
- Debug tests with design engineers to deliver functionally correct design blocks
- Apply close coverage measures to identify verification holes and to show progress towards tape-out
Requirements For Junior CPU Design Verification Engineer
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- Experience creating and using verification components and environments in standard verification methodology
- Experience verifying digital logic at Register Transfer Level (RTL) level using SystemVerilog or Specman/E for Field Programmable Gate Arrays or ASICs
- Experience with Universal Verification Methodology (UVM), SystemVerilog, or other scripting languages (preferred)
- Experience with CPU implementation, assembly language, or compute SOCs (preferred)
- Master's degree in Electrical Engineering or Computer Science (preferred)
Benefits For Junior CPU Design Verification Engineer
- Equal opportunity employer
- Accommodation for special needs
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