Lead CPU RTL Engineer, Silicon

Google develops innovative technology solutions, organizing world's information to make it universally accessible and useful.
Poughkeepsie, NY, USAAustin, TX, USAMountain View, CA, USA
$183,000 - $271,000
Backend
Staff Software Engineer
In-Person
5,000+ Employees
8+ years of experience
AI · Consumer · Enterprise SaaS

Description For Lead CPU RTL Engineer, Silicon

Google is seeking a Lead CPU RTL Engineer to join their hardware team, focusing on developing custom silicon solutions for Google's direct-to-consumer products. This role involves pushing boundaries in processor design and contributing to next-generation CPU development. The position requires expertise in digital logic design, RTL concepts, and microarchitecture optimization. As part of Google's mission to organize world's information, you'll work at the intersection of AI, Software, and Hardware to create innovative computing solutions. The role offers competitive compensation including base salary, bonus, equity, and comprehensive benefits. The ideal candidate will have strong technical skills in processor design, ability to optimize for performance and power efficiency, and experience in leading complex hardware projects. This is an opportunity to impact millions of users worldwide through Google's hardware innovations.

Last updated 12 hours ago

Responsibilities For Lead CPU RTL Engineer, Silicon

  • Contribute to CPU frontend designs, emphasizing on microarchitecture and RTL design for the next generation CPU
  • Propose performance enhancing microarchitecture features with efficiency in mind
  • Work with architects and performance teams for trade-off studies
  • Deliver designs meeting Power, performance and area (PPA) goals with production quality
  • Become familiar with state-of-the-art techniques for at least one processor functional block

Requirements For Lead CPU RTL Engineer, Silicon

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
  • 8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog
  • Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques

Benefits For Lead CPU RTL Engineer, Silicon

Medical Insurance
Equity
  • Base salary
  • Bonus
  • Equity
  • Benefits package

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