Lead CPU RTL Engineer, Silicon

Google organizes world's information and creates innovative AI, Software, and Hardware solutions.
Poughkeepsie, NY, USAAustin, TX, USAMountain View, CA, USA
$177,000 - $266,000
Embedded
Staff Software Engineer
In-Person
5,000+ Employees
8+ years of experience
AI · Consumer · Enterprise SaaS

Description For Lead CPU RTL Engineer, Silicon

Google is seeking a Lead CPU RTL Engineer to join their hardware team, focusing on developing custom silicon solutions for Google's direct-to-consumer products. This role involves working on CPU frontend designs and microarchitecture for next-generation processors. The position offers an opportunity to shape the future of Google's hardware experiences, combining AI, Software, and Hardware expertise. The successful candidate will contribute to innovative processor designs, optimize performance and power efficiency, and work closely with architects and performance teams. This role is perfect for experienced engineers passionate about computer architecture and digital design, offering competitive compensation and the chance to impact products used by millions worldwide. The position requires deep expertise in RTL design and modern processor architecture, with opportunities to work on cutting-edge technology at one of the world's leading tech companies.

Last updated 6 minutes ago

Responsibilities For Lead CPU RTL Engineer, Silicon

  • Contribute to CPU frontend designs, emphasizing on microarchitecture and RTL design for the next generation CPU
  • Propose performance enhancing microarchitecture features with efficiency in mind
  • Work with architects and performance teams for trade-off studies
  • Deliver designs meeting Power, performance and area (PPA) goals with production quality
  • Become familiar with state-of-the-art techniques for at least one processor functional block

Requirements For Lead CPU RTL Engineer, Silicon

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
  • 8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog
  • Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques

Benefits For Lead CPU RTL Engineer, Silicon

Medical Insurance
Equity
  • Base salary + bonus + equity + benefits

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