ML Accelerator Architect and Performance Engineer, Silicon

Google is seeking a ML Accelerator Architect and Performance Engineer to join their Silicon team, focusing on the future of machine learning hardware acceleration. This role combines hardware architecture expertise with software optimization, making it perfect for those passionate about ML infrastructure development.

The position involves working at the intersection of hardware and machine learning, where you'll be responsible for exploring and developing future hardware architectures while collaborating with research teams and compiler engineers. You'll be working on cutting-edge technology that powers Google's direct-to-consumer products, contributing to innovations that impact millions of users worldwide.

As a member of this team, you'll be involved in various aspects of the development process, from hardware architecture exploration to compiler optimization and runtime strategies. The role requires a strong background in computer architecture, performance engineering, and machine learning frameworks, making it ideal for candidates with both hardware and software expertise.

The position offers the opportunity to work with some of the brightest minds in the industry, contributing to Google's mission of organizing the world's information and making it universally accessible. You'll be part of a diverse team that pushes boundaries in custom silicon solutions, directly impacting the next generation of hardware experiences.

Key responsibilities include driving hardware architecture exploration, optimizing performance through simulator development, and enhancing user experiences through efficient ML workload distribution. The ideal candidate will have at least 5 years of relevant experience, strong programming skills in C/C++ or Python, and experience with deep learning frameworks.

This role is based in New Taipei, Taiwan, offering the chance to work with Google's global team while contributing to cutting-edge ML accelerator development. The position combines technical challenges with the opportunity to impact Google's hardware future, making it an exciting opportunity for those interested in the intersection of ML and hardware architecture.