Network Register Transfer Level Design Engineer
Description For Network Register Transfer Level Design Engineer
Google is seeking a Network Register Transfer Level Design Engineer to join their Technical Infrastructure team. This role is crucial in developing custom silicon solutions that power Google's data center networking infrastructure. The position involves working on Application-Specific Integrated Circuits (ASICs) used to accelerate networking in data centers, with responsibilities spanning project definition, design, and implementation.
The ideal candidate will have extensive experience in networking ASIC architecture, with a strong background in RDMA-based transports and deep understanding of data center networking protocols. You'll be working on cutting-edge technology that powers Google's vast infrastructure, contributing to the development of next-generation hardware experiences that deliver unparalleled performance and efficiency.
As part of Google's Technical Infrastructure team, you'll collaborate with world-class engineers to maintain and develop Google's data centers and platforms. The role offers the opportunity to work on complex technical challenges at scale, implementing solutions that directly impact Google's product portfolio and user experience.
The position requires a blend of hardware and software expertise, with responsibilities including ASIC design evaluation, protocol development, and micro-architecture specification. You'll be at the forefront of innovation in data center networking, working with state-of-the-art technology and contributing to Google's continued leadership in cloud infrastructure.
This is an excellent opportunity for experienced engineers who are passionate about hardware design, networking protocols, and high-performance computing. You'll be part of a diverse team that pushes boundaries and develops solutions used by millions of people worldwide, while working in an environment that values innovation, collaboration, and technical excellence.
Responsibilities For Network Register Transfer Level Design Engineer
- Participate in evaluation of future ASIC designs and general architecture for executing Google's data center networking roadmap
- Collaborate in developing new layer protocols for data center networking
- Understand how everything interacts with software and other ASIC subsystems to implement data center networks
- Define performance hardware/software interfaces. Write micro-architecture and design specifications
- Define efficient micro-architecture and block partitioning/interfaces and flows
Requirements For Network Register Transfer Level Design Engineer
- Bachelor's degree or equivalent practical experience
- 8 years of experience architecting networking ASICs from specification to production
- Experience working with design networking like: RDMA and packet processing
- Experience developing Register Transfer Level (RTL) for ASIC subsystems
- Experience in Cross-functional, micro-architecture, design, verification, logic synthesis, and timing closure
- Experience in TCP, IP, Ethernet, PCIE and DRAM, Network on Chip principles and protocols
- Experience in estimating performance by analysis, modeling, and network simulation
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