RTL Design Engineer, Camera and Machine Learning, Silicon
Description For RTL Design Engineer, Camera and Machine Learning, Silicon
Google is seeking an RTL Design Engineer to join their innovative hardware team focusing on camera and machine learning designs. This role combines cutting-edge technology in silicon design with Google's mission to organize world's information. The position involves developing custom silicon solutions that power Google's direct-to-consumer products, working on Register-Transfer Level (RTL) design development specifically for camera and machine learning implementations.
The role requires expertise in digital logic design, RTL concepts, and hardware description languages like Verilog/SystemVerilog. You'll be responsible for RTL coding, architecture development, power and performance optimizations, and collaboration on test planning. The position offers an opportunity to work on high-impact projects that affect millions of users worldwide through Google's hardware products.
The ideal candidate will have strong technical skills in hardware design, experience with synthesis techniques, and familiarity with scripting languages. The role offers competitive compensation including base salary, bonus, equity, and comprehensive benefits. You'll be working in either Mountain View or San Diego, contributing to Google's next generation of hardware experiences.
This is an excellent opportunity for someone passionate about hardware design, particularly in the areas of camera image processing and machine learning implementations. You'll be part of a diverse team that pushes boundaries and develops solutions that combine the best of Google's AI, Software, and Hardware capabilities to create radically helpful experiences.
Responsibilities For RTL Design Engineer, Camera and Machine Learning, Silicon
- Perform Verilog/SystemVerilog RTL coding, function/performance simulation debug, and Lint/CDC/FV/UPF checks
- Perform RTL verification using industry standard methodologies. Participate in test planning and coverage analysis
- Develop RTL implementations that meet engaged power, performance and area goals
- Participate in synthesis, timing/power closure and field programmable gate array (FPGA)/silicon bring-up
- Create tools/scripts to automate tasks and track progress
Requirements For RTL Design Engineer, Camera and Machine Learning, Silicon
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, or equivalent practical experience
- 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog
- Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques
- Experience with a scripting language such as Perl or Python
Benefits For RTL Design Engineer, Camera and Machine Learning, Silicon
- Bonus
- Equity
- Benefits package
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