Semiconductor Process Engineer, Raxium Display Group

Google combines AI, software, and hardware to create radically helpful experiences, researching and developing new technologies for faster, seamless computing.
$142,000 - $211,000
Hardware
Mid-Level Software Engineer
In-Person
5,000+ Employees
4+ years of experience
Hardware · AR/VR

Description For Semiconductor Process Engineer, Raxium Display Group

Google's Raxium display group is pioneering revolutionary semiconductor materials display technology that enables new functionality in display products, particularly for augmented reality (AR) and light-field display applications. The group operates from a state-of-the-art compound semiconductor fab in Silicon Valley and aims to disrupt next-generation display markets.

As a Semiconductor Process Engineer, you'll be part of a diverse team developing custom silicon solutions for Google's direct-to-consumer products. Your work will directly impact products used by millions worldwide, focusing on back-end of line (BEOL) capabilities including chemical mechanical polishing (CMP), wafer grinding, and wafer bonding fabrication.

The role combines technical expertise in semiconductor engineering with process optimization and quality control. You'll be responsible for implementing and improving wafer fabrication processes, managing process control plans, and driving problem resolution through data analytics and methodical problem solving.

This position offers competitive compensation including base salary, bonus, equity, and comprehensive benefits. The team culture emphasizes innovation, technical excellence, and the opportunity to work on cutting-edge display technology that bridges the digital and physical realms.

Ideal candidates will have strong backgrounds in electrical engineering, physics, or related fields, with specific experience in semiconductor engineering and microelectronics fabrication. Advanced degree holders are particularly valued, especially those with expertise in Chip-Level Multi-Processing or wafer-related technologies.

Join Google's Raxium display group to be at the forefront of display technology innovation, working with state-of-the-art facilities and contributing to the next generation of AR and display solutions.

Last updated 2 months ago

Responsibilities For Semiconductor Process Engineer, Raxium Display Group

  • Design and develop a new back-end of line (BEOL) capability including chemical mechanical polishing (CMP), wafer grinding, and wafer bonding fabrication
  • Identify and evaluate quality and implement new equipment or upgrades
  • Review, propose, optimize, improve, and implement various wafer fabrication processes for yield improvement, defectivity reduction, and manufacturability
  • Own the area process control plan and enhance the process stability through implementation of best known manufacturing methods and statistical process control (SPC)
  • Drive the problem resolution process associated with the quality excursion in the fab area encompassing data analytics, methodical problem solving, failure analysis (FA), design of experiments (DOE), and mistake-proof

Requirements For Semiconductor Process Engineer, Raxium Display Group

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience
  • 4 years of experience working in a Hardware technical environment, or 3 years of experience with an advanced degree
  • Experience with Semiconductor Engineering and Microelectronics Fabrication
  • Experience with Optoelectronics

Benefits For Semiconductor Process Engineer, Raxium Display Group

  • bonus
  • equity
  • benefits package

Interested in this job?

Jobs Related To Google Semiconductor Process Engineer, Raxium Display Group

Hardware Architect, Core IP, Silicon

Hardware Architect position at Google focusing on ASIC architecture and silicon design for multimedia and processing units.

Silicon Hardware Architecture Modeling Engineer, TPU, Google Cloud

Silicon Hardware Architecture Modeling Engineer position at Google, focusing on TPU development and ML hardware acceleration, requiring expertise in computer architecture and C++ programming.

TPU RTL Design Engineer

TPU RTL Design Engineer position at Google, developing custom silicon solutions and ASICs for data center acceleration, requiring expertise in SystemVerilog RTL and digital design.

Supplier Quality Engineer, Printed Circuit Board, Google Cloud

PCB Supplier Quality Engineer position at Google Cloud, focusing on quality control and reliability of printed circuit board manufacturing processes.

Epitaxy Equipment Maintenance Engineer, MicroLED Display, Augmented Reality

Lead maintenance and optimization of MOCVD epitaxial growth reactors for Google's revolutionary microLED display technology team.