Senior CPU Design Verification Engineer

Google is a global technology company that develops custom silicon solutions and powers direct-to-consumer products used by millions worldwide.
Embedded
Senior Software Engineer
In-Person
5,000+ Employees
3+ years of experience
Enterprise SaaS · Hardware

Description For Senior CPU Design Verification Engineer

Google is seeking a Senior CPU Design Verification Engineer to join their Technical Infrastructure team. This role is crucial in developing custom silicon solutions that power Google's direct-to-consumer products. As part of the server chip design team, you'll be responsible for building verification components, implementing constrained-random testing, and ensuring verification closure.

The position requires expertise in digital logic verification at the RTL level, with a strong foundation in SystemVerilog or Specman/E for FPGAs or ASICs. You'll work closely with design engineers to understand specifications, create verification environments, and debug tests to ensure functionality. The role demands both technical depth in verification methodologies and the ability to collaborate effectively with cross-functional teams.

Google's Technical Infrastructure team is fundamental to maintaining the architecture behind all Google products. They take pride in being the "engineers' engineers" and are responsible for developing and maintaining data centers and building next-generation Google platforms. This role offers the opportunity to work on cutting-edge hardware solutions that directly impact millions of users worldwide.

The ideal candidate will have at least 3 years of relevant experience and a Bachelor's degree in Electrical Engineering or equivalent. Experience with CPU implementation, assembly language, or compute System on Chip (SOC) is highly valued. Knowledge of UVM, SystemVerilog, and scripting languages like Python is also beneficial.

This position offers the unique opportunity to work at one of the world's leading technology companies, contributing to innovations that shape the future of hardware experiences. You'll be part of a diverse team that pushes boundaries and strives for unparalleled performance, efficiency, and integration in their solutions.

Last updated 43 minutes ago

Responsibilities For Senior CPU Design Verification Engineer

  • Plan the verification of digital design blocks by understanding design specification and interacting with design engineers
  • Create and enhance constrained-random verification environments using SystemVerilog/UVM, or Specman
  • Identify and write all types of coverage measures for stimulus and corner-cases
  • Debug tests with design engineers to deliver functionally correct design blocks
  • Lead coverage measures to identify verification holes and show progress towards tape-out

Requirements For Senior CPU Design Verification Engineer

Python
  • Bachelor's degree in Electrical Engineering or equivalent practical experience
  • 3 years of experience verifying digital logic at RTL level using SystemVerilog, or Specman/E for FPGAs or ASICs
  • Experience verifying digital systems using standard IP components/interconnects
  • Experience creating and using verification components and environments in standard verification methodology

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