Senior Design Engineer, Silicon

Google organizes the world's information and makes it universally accessible and useful, combining AI, Software, and Hardware to create helpful experiences.
Embedded
Senior Software Engineer
In-Person
5,000+ Employees
3+ years of experience
AI · Hardware

Description For Senior Design Engineer, Silicon

Join Google's innovative hardware team as a Senior Design Engineer, Silicon, where you'll be part of a diverse team pushing boundaries in custom silicon solutions that power Google's direct-to-consumer products. This role combines hardware expertise with Google's cutting-edge AI and software capabilities to create next-generation computing experiences.

You'll be working on developing custom silicon solutions that drive the future of Google's hardware products, focusing on performance, efficiency, and integration. The position requires deep expertise in RTL design, microarchitecture, and low-power schemes, making it perfect for someone passionate about hardware design at the cutting edge of technology.

The role offers the opportunity to work on products used by millions worldwide, with responsibilities spanning from defining microarchitecture details to performing complex RTL development and quality checks. You'll be contributing to Google's mission of organizing the world's information while working with state-of-the-art technology and methodologies.

This position is ideal for candidates with strong backgrounds in electrical engineering or computer science, particularly those with experience in RTL design, power optimization, and hardware verification. You'll be working in Bengaluru, India, as part of Google's global hardware team, contributing to projects that directly impact the company's consumer products.

The role combines technical expertise with the opportunity to innovate at scale, making it an excellent opportunity for experienced hardware engineers looking to make a significant impact in the tech industry.

Last updated 8 hours ago

Responsibilities For Senior Design Engineer, Silicon

  • Define microarchitecture details such as interface protocol, block diagram, data flow, pipelines, etc.
  • Perform Register-Transfer Level (RTL) development (SystemVerilog), RTL integration (Perl), debug functional/performance simulations
  • Perform RTL quality checks including Lint, CDC, RDC, Synthesis, Unified Power Format (UPF) checks

Requirements For Senior Design Engineer, Silicon

Python
  • Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience
  • 3 years of experience with Register-Transfer Level (RTL) design using Verilog/System Verilog and microarchitecture
  • Experience in handling low power schemes, power roll up and power estimations
  • Experience in RTL quality sign-off flows (e.g., CDC, RDC, Lint, Power Intent or LEC)
  • Experience with Perl or Python

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