Senior IP Design Verification Engineer

Google organizes the world's information and makes it universally accessible and useful, combining AI, Software, and Hardware to create helpful experiences.
Embedded
Senior Software Engineer
In-Person
5,000+ Employees
5+ years of experience
Hardware

Description For Senior IP Design Verification Engineer

Google is seeking a Senior IP Design Verification Engineer to join their hardware team in Bengaluru. This role is crucial in developing custom silicon solutions that power Google's direct-to-consumer products. The position requires extensive experience in IP Development and verification, with a focus on digital systems and standard IP components.

The ideal candidate will have 5+ years of experience and strong expertise in verification methodologies like UVM, SystemVerilog, and various interconnect protocols. You'll be working on next-generation configurable Infrastructure IPs, interconnects, and memory subsystems, ensuring their functionality and reliability through comprehensive verification processes.

As part of Google's hardware team, you'll contribute to innovations that impact millions of users worldwide. The role combines technical expertise in hardware verification with the opportunity to work on cutting-edge technology that pushes the boundaries of what's possible in consumer hardware.

The position offers the chance to work with a diverse team at one of the world's leading technology companies, focusing on creating radically helpful experiences through the combination of Google AI, Software, and Hardware. You'll be involved in all aspects of the verification process, from planning to execution, working closely with design engineers to deliver high-quality hardware solutions.

This is an excellent opportunity for someone passionate about hardware verification who wants to make a significant impact on Google's future hardware products. The role offers the perfect blend of technical challenges and the opportunity to work on products that will shape the next generation of computing experiences.

Last updated a day ago

Responsibilities For Senior IP Design Verification Engineer

  • Plan and execute the verification of the next generation configurable Infrastructure Intellectual Property (IPs), interconnects and memory subsystems
  • Create and enhance constrained-random verification environments using System Verilog and Universal Verification Methodology (UVM)
  • Identify and write all types of coverage measures for stimulus and corner-cases
  • Debug tests with design engineers to deliver functionally correct blocks and subsystems
  • Close coverage measures to identify verification holes and to show progress towards tape-out

Requirements For Senior IP Design Verification Engineer

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
  • 5 years of experience with Intellectual Property (IP) Development or Integration
  • Experience in verifying digital systems using standard IP components or interconnects
  • Experience creating and using verification components and environments in UVM
  • Experience verifying digital logic at RTL level using SystemVerilog or C/C++
  • Experience with Interconnect Protocols (AHB, AXI, ACE, CHI, CCIX, CXL)

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