Senior Lead CPU RTL Engineer
Description For Senior Lead CPU RTL Engineer
Google is seeking a Senior Lead CPU RTL Engineer to join their hardware team focused on developing custom silicon solutions for Google's direct-to-consumer products. This role combines advanced hardware engineering with Google's cutting-edge AI initiatives to create next-generation computing experiences.
The position requires deep expertise in CPU design and RTL development, with responsibilities spanning from microarchitecture development to performance optimization. You'll work on front-end designs for next-generation CPUs, collaborating with cross-functional teams including Software, Architecture, and Performance teams to deliver innovative solutions.
This is an excellent opportunity for an experienced hardware engineer looking to make an impact at scale. You'll be working on products used by millions worldwide, with access to Google's vast resources and cutting-edge technology. The role offers competitive compensation ($227,000-$320,000 base salary plus bonus and equity) and comprehensive benefits.
The ideal candidate will have at least 10 years of experience in digital logic design and RTL development, with a strong background in CPU architecture. Knowledge of modern processor design techniques and experience with SystemVerilog or similar HDL languages is essential. A PhD in Electrical Engineering or Computer Science is preferred.
Working at Google, you'll be part of a team that pushes boundaries in hardware development, with opportunities to influence the direction of future Google products. The role offers the chance to work on challenging technical problems while collaborating with some of the best minds in the industry.
Responsibilities For Senior Lead CPU RTL Engineer
- Participate in developing CPU subsystem. Develop CPU subsystem front-end designs, emphasizing microarchitecture and RTL design for the next generation CPU
- Propose performance enhancing microarchitecture features, and work with Software, Architect, and Performance teams for trade-off studies
- Communicate the pros and cons of microarchitecture enhancements. Deliver designs, meeting PPA goals with production quality
- Work with the Verification team to ensure production of quality designs, and the physical design and power teams to meet frequency, power, and area goals
- Become familiar with modern techniques, interpret the techniques into design constructs, and languages in order to provide guidance to and participate in the performance evaluation effort
Requirements For Senior Lead CPU RTL Engineer
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- 10 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog
- Experience with RTL language (e.g. SystemVerilog) and related design processes (e.g., Lint, UPF)
Benefits For Senior Lead CPU RTL Engineer
- bonus
- equity
- benefits
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