Senior Mixed-Signal Design Verification Engineer
Description For Senior Mixed-Signal Design Verification Engineer
Google is seeking a Senior Mixed-Signal Design Verification Engineer to join their innovative hardware team. This role combines the best of Google's AI, Software, and Hardware capabilities to create groundbreaking technologies. As a verification engineer, you'll lead the development and execution of verification strategies for complex mixed-signal designs, working with cutting-edge ASIC technology.
The position requires expertise in SystemVerilog, digital verification, and mixed-signal design verification. You'll be responsible for creating comprehensive test environments, implementing coverage metrics, and ensuring the quality of hardware designs that will be used by millions of people worldwide.
Working at Google means joining an extraordinarily creative and motivated team that pushes the boundaries of technology. You'll collaborate with cross-functional teams, including system architects, software engineers, and physical implementation specialists, to deliver high-quality hardware solutions.
The role offers competitive compensation, including a base salary range of $150,000-$223,000, plus bonus, equity, and comprehensive benefits. You'll be based in Mountain View, CA, where you'll have access to Google's world-class facilities and resources.
This is an excellent opportunity for an experienced verification engineer who wants to make a significant impact on next-generation technologies while working with some of the brightest minds in the industry. You'll be at the forefront of hardware development, helping Google create radically helpful experiences through innovative technology solutions.
Responsibilities For Senior Mixed-Signal Design Verification Engineer
- Plan and execute on the verification of digital and mixed signal design blocks
- Identify and implement key coverage metrics for stimulus and corner-cases
- Design verification and work with stakeholders to come up with detailed execution plans
- Work closely with system, software, design, DFT and physical implementation stakeholders
- Be the primary point of contact for functional verification for cross-functional teams
Requirements For Senior Mixed-Signal Design Verification Engineer
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- 5 years of experience leading digital verification using SystemVerilog for ASIC designs
- Experience developing and maintaining design verification (DV) testbenches, test cases, and test environments
- Experience in creating detailed block-level design verification strategies and plans
- Experience in RTL, low power, gate level and formal verification techniques
- Experience working with mixed signal designs and mixed mode verification
- Knowledge of analog design basics
- Proficiency in one or more scripting languages (Python, etc.)
Benefits For Senior Mixed-Signal Design Verification Engineer
- bonus
- equity
- benefits
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