Senior Mixed-Signal Design Verification Engineer
Description For Senior Mixed-Signal Design Verification Engineer
Google is seeking a Senior Mixed-Signal Design Verification Engineer to join their innovative hardware team. This role combines the cutting-edge intersection of digital and analog design verification, working on technologies that impact millions of users worldwide. The position offers an exciting opportunity to work with Google's advanced AI, Software, and Hardware initiatives, developing next-generation technologies that transform how users interact with information.
The role requires deep expertise in digital verification using SystemVerilog, with a focus on mixed-signal design verification. You'll be responsible for leading verification efforts, working with cross-functional teams, and ensuring the quality and reliability of complex hardware designs. The position offers significant technical challenges, working with state-of-the-art mixed-signal designs and verification methodologies.
As a senior engineer, you'll have the opportunity to influence technical decisions, lead infrastructure development, and work with talented teams across system, software, design, and implementation domains. The role offers competitive compensation, including a strong base salary range of $150,000-$223,000, plus bonus, equity, and comprehensive benefits.
This is an ideal opportunity for experienced verification engineers who want to make a significant impact at scale, working on products that combine Google's expertise in AI, software, and hardware. You'll be part of a team that's pushing the boundaries of technology, creating radically helpful experiences for users worldwide. The role offers both technical challenges and leadership opportunities, making it perfect for those looking to advance their careers in hardware verification at one of the world's leading technology companies.
Responsibilities For Senior Mixed-Signal Design Verification Engineer
- Plan and execute verification of digital and mixed signal design blocks
- Identify and implement key coverage metrics for stimulus and corner-cases
- Design verification and work with stakeholders on detailed execution plans
- Work closely with system, software, design, DFT and physical implementation stakeholders
- Be the primary point of contact for functional verification and lead DV infrastructure components
Requirements For Senior Mixed-Signal Design Verification Engineer
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- 5 years of experience leading digital verification using SystemVerilog for ASIC designs
- Experience developing and maintaining design verification (DV) testbenches, test cases, and test environments
- Experience in creating detailed block-level design verification strategies and plans
- Experience in RTL, low power, gate level and formal verification techniques
- Experience working with mixed signal designs and mixed mode verification
- Knowledge of analog design basics and SystemVerilog modeling
- Proficiency in Python or other scripting languages
Benefits For Senior Mixed-Signal Design Verification Engineer
- bonus
- equity
- benefits
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