Senior Physical Design Engineer, Mixed Signal, Silicon
Description For Senior Physical Design Engineer, Mixed Signal, Silicon
Google is seeking a Senior Physical Design Engineer to join their hardware team focused on developing custom silicon solutions for direct-to-consumer products. This role combines hardware expertise with Google's cutting-edge AI and software capabilities to create innovative solutions that power Google's future products.
The position requires deep expertise in physical design, with emphasis on Place and Route (PnR), Static Timing Analysis (STA), and Design Rule Checking (DRC). You'll work on synthesized designs, implementing complex digital blocks while ensuring optimal performance, power efficiency, and area utilization. The role demands strong technical skills in ASIC design and familiarity with modern EDA tools and methodologies.
As a Senior Physical Design Engineer, you'll collaborate closely with front-end designers and back-end physical design integration engineers to deliver high-quality results. You'll be responsible for monitoring and optimizing timing, analyzing power integrity, and implementing fixes for electromagnetic migration and IR drop issues.
The ideal candidate should have experience with low-power design techniques, advanced ECO methodologies, and working with scaled CMOS processes like FinFET. Knowledge of analog and mixed-signal design integration is highly valued, as is experience with version control systems and scripting languages.
This is an opportunity to contribute to products used by millions worldwide while working with a diverse team at the forefront of hardware innovation. You'll be part of Google's mission to create radically helpful experiences through the perfect integration of AI, software, and hardware. The role offers the chance to shape the next generation of hardware experiences, focusing on unparalleled performance, efficiency, and integration.
Join Google's hardware team to push boundaries in custom silicon development and be part of creating innovative solutions that directly impact consumer products. Your expertise will contribute to advancing Google's hardware capabilities while working in a collaborative environment that values diversity and technical excellence.
Responsibilities For Senior Physical Design Engineer, Mixed Signal, Silicon
- Generate high-quality Place and Route (PnR) results for digital blocks, including DRC and LVS signoff
- Monitor timing of blocks with modern Static Timing Analysis (STA) tools and techniques
- Analyze designs based on key metrics, including power, area, and performance trade-off
- Apply engineering best practices to the design and implementation of ASIC blocks
- Analyze power integrity Electromagnetic migration and IR drop (EMIR) of blocks and implement fixes
Requirements For Senior Physical Design Engineer, Mixed Signal, Silicon
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- 5 years of experience in physical design
- Experience with PnR/APR, STA, EMIR, and DRC tools/flows working on synthesized designs
- Experience in one or more scripting languages (e.g., Tcl, Python, etc.)
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