Google is seeking a Senior Physical Design Engineer to join their hardware team, focusing on custom silicon solutions for direct-to-consumer products. This role combines cutting-edge hardware development with Google's innovative technology stack. The position involves working on physical design for mixed-signal circuits, requiring expertise in Place and Route (PnR), Static Timing Analysis (STA), and various hardware design tools.
The ideal candidate will be part of a diverse team pushing boundaries in custom silicon development, directly impacting Google's consumer products used by millions worldwide. You'll work on generating quality PnR results, monitoring timing with modern STA tools, and analyzing designs for optimal power, area, and performance trade-offs.
The role requires strong technical skills in physical design, with experience in PnR/APR, STA, EMIR, and DRC tools/flows. Knowledge of scripting languages like Python and Tcl is essential. Additional expertise in low-power design techniques, advanced ECO techniques, and experience with scaled CMOS processes (FinFET) would be valuable.
This position offers the opportunity to work on next-generation hardware experiences, delivering unparalleled performance, efficiency, and integration. You'll collaborate with front-end designers and back-end physical design integration engineers, contributing to Google's mission of organizing the world's information and making it universally accessible and useful.
The role combines hardware engineering with Google's innovative culture, offering the chance to work on cutting-edge technology while being part of a company known for its inclusive workplace and commitment to diversity.