Senior Physical Design Engineer, Mixed Signal, Silicon
Description For Senior Physical Design Engineer, Mixed Signal, Silicon
Google is seeking a Senior Physical Design Engineer to join their hardware team focused on developing custom silicon solutions for direct-to-consumer products. This role combines hardware expertise with Google's cutting-edge AI and software capabilities to create innovative solutions that power millions of users worldwide.
The position requires deep expertise in physical design, with emphasis on Place and Route (PnR), Static Timing Analysis (STA), and Design Rule Checking (DRC). You'll work on synthesized designs, implementing complex digital blocks while ensuring optimal performance, power efficiency, and area utilization. The role demands proficiency in scripting languages and modern EDA tools.
As a Senior Physical Design Engineer, you'll collaborate closely with front-end designers and back-end physical design integration engineers to deliver high-quality results. You'll be responsible for monitoring and optimizing timing, analyzing power integrity, and implementing fixes for electromagnetic migration and IR drop issues.
The ideal candidate should have experience with advanced techniques including low-power design, Engineering Change Orders (ECO), and Analog and Mixed Signal design integration. Knowledge of scaled CMOS processes and version control systems is highly valued.
This is an opportunity to shape the future of Google's hardware experiences, working with a diverse team that pushes boundaries in silicon design. You'll contribute to products that combine the best of Google's technological capabilities, making computing faster, seamless, and more powerful for users worldwide.
The role offers the chance to work on cutting-edge technology while being part of Google's mission to organize the world's information and make it universally accessible. You'll be at the forefront of hardware innovation, developing solutions that directly impact millions of users through Google's consumer products.
Responsibilities For Senior Physical Design Engineer, Mixed Signal, Silicon
- Generate high-quality Place and Route (PnR) results for digital blocks, including DRC and LVS signoff
- Monitor timing of blocks with modern Static Timing Analysis (STA) tools and techniques
- Analyze designs based on key metrics, including power, area, and performance trade-off
- Apply engineering best practices to the design and implementation of ASIC blocks
- Analyze power integrity Electromagnetic migration and IR drop (EMIR) of blocks and implement fixes
Requirements For Senior Physical Design Engineer, Mixed Signal, Silicon
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- 5 years of experience in physical design
- Experience with PnR/APR, STA, EMIR, and DRC tools/flows working on synthesized designs
- Experience in one or more scripting languages (e.g., Tcl, Python, etc.)
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