Senior Silicon DFT Engineer

Google is a global technology company that develops and provides a wide range of internet-related services and products.
Backend
Senior Software Engineer
In-Person
5,000+ Employees
8+ years of experience
AI

Description For Senior Silicon DFT Engineer

As a Senior Silicon DFT Engineer at Google Cloud, you will play a crucial role in DFT Architecture and DFT design, supporting devices of extreme complexity to production. You will be responsible for providing technical leadership in DFT, developing flows, automation, and methodology, planning DFT activities, tracking the DFT quality matrix throughout the project lifecycle, and providing sign-off DFT to tapeout.

You will be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Key responsibilities include:

  • Leading and executing activities in the design, implementation, and verification of DFT solutions for large-scale ASICs.
  • Developing DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST), and Automatic Test Pattern Generation (ATPG).
  • Working with other Engineering teams to ensure that DFT requirements are met and mutual dependencies are managed.
  • Managing the DFT team's workload and deliverables, providing technical leadership and guidance to the team.
  • Leading DFT execution of a silicon project - planning, execution, tracking, quality, and signoff.

This role offers the opportunity to contribute to the innovation behind products loved by millions worldwide, working on cutting-edge hardware solutions within Google Cloud.

Last updated 3 days ago

Responsibilities For Senior Silicon DFT Engineer

  • Lead and execute activities in the design, implementation, and verification of DFT solutions for large-scale ASICs
  • Develop DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST), and Automatic Test Pattern Generation (ATPG)
  • Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT requirements are met and mutual dependencies are managed
  • Manage the DFT team's workload and deliverables, provide technical leadership and guidance to the team
  • Lead DFT execution of a silicon project - planning, execution, tracking, quality, and signoff

Requirements For Senior Silicon DFT Engineer

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience
  • 8 years of experience in Automatic Test Pattern Generation (ATPG) methods
  • 4 years of people management experience developing employees
  • Experience with multiple projects in DFT design and verification, DFT specification, definition, architecture, and insertion
  • Experience with DFT techniques and tools, ASIC DFT synthesis, simulation, and verification flow
  • Experience in leading DFT activities throughout an ASIC development flow

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