Senior Silicon Digital Design Engineer

Google organizes the world's information and makes it universally accessible and useful, combining AI, Software, and Hardware.
$156,000 - $229,000
Embedded
Senior Software Engineer
In-Person
5,000+ Employees
5+ years of experience
Hardware

Description For Senior Silicon Digital Design Engineer

Google is seeking a Senior Silicon Digital Design Engineer to join their hardware team focused on developing custom silicon solutions for direct-to-consumer products. This role combines cutting-edge hardware development with Google's expertise in AI and software to create innovative solutions. The position requires extensive experience in digital logic design, RTL development, and IP integration.

The ideal candidate will have at least 5 years of experience working with digital logic design principles and RTL concepts, particularly with Verilog or SystemVerilog. They will be responsible for RTL coding, simulation debugging, and various technical checks including Lint, CDC, and UPF. The role involves collaboration with cross-functional teams and participation in comprehensive testing and verification processes.

Google offers a competitive compensation package including a base salary range of $156,000-$229,000, plus bonus, equity, and comprehensive benefits. The position is based in Mountain View, CA, and offers the opportunity to work on products that impact millions of users worldwide.

The role combines technical expertise with innovative problem-solving, requiring both deep hardware knowledge and the ability to work effectively in a collaborative environment. You'll be part of a team that pushes boundaries in hardware development, focusing on performance, efficiency, and integration. This is an excellent opportunity for someone passionate about hardware design who wants to contribute to Google's next generation of consumer products.

Last updated 17 hours ago

Responsibilities For Senior Silicon Digital Design Engineer

  • Perform RTL coding, function and performance simulation debugging and Lint, CDC, FV, UPF checks
  • Participate in test plan and coverage analysis of the sub-system and chip-level verification
  • Collaborate with cross-functional teams to debug failures (e.g., boards, software, manufacturing, design, thermal issues)

Requirements For Senior Silicon Digital Design Engineer

Python
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
  • 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog
  • 5 years of experience with IP Development and/or Integration
  • Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques
  • Experience with scripting languages like Perl or Python

Benefits For Senior Silicon Digital Design Engineer

Medical Insurance
Dental Insurance
Vision Insurance
401k
Equity
  • Comprehensive benefits package including medical, dental, vision insurance
  • 401k plan
  • Equity compensation
  • Bonus compensation

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