Senior Silicon Digital RTL Design Engineer
Description For Senior Silicon Digital RTL Design Engineer
Google is seeking a Senior Silicon Digital RTL Design Engineer to join their hardware team focused on developing custom silicon solutions for direct-to-consumer products. This role combines cutting-edge hardware development with Google's mission to create radically helpful experiences. The position requires expertise in digital logic design, RTL concepts, and hardware verification.
As a Senior Silicon Digital RTL Design Engineer, you'll be working on innovative hardware solutions that power Google's consumer products, directly impacting millions of users worldwide. You'll be responsible for architecting, designing, and verifying digital logic using industry-standard tools and languages like Verilog and SystemVerilog. The role involves close collaboration with physical design teams to ensure efficient implementation and with system architects to define specifications.
The ideal candidate should have strong experience in digital logic design, IP development, and modern CMOS processes. You'll be working with state-of-the-art technology and will have the opportunity to influence the next generation of Google's hardware experiences. The position offers the chance to work with cross-functional teams, combining expertise in digital design, physical implementation, and system architecture.
This role is perfect for someone who is passionate about hardware design, has a strong background in digital logic and RTL design, and wants to contribute to products that push the boundaries of what's possible in consumer technology. You'll be part of Google's mission to create innovative hardware solutions while working with a diverse team of experts in their field.
Responsibilities For Senior Silicon Digital RTL Design Engineer
- Architect, design and verify digital logic using Verilog and SystemVerilog
- Interface with physical designers to generate high quality physical implementations through synthesis, place-and-route, timing closure and verification
- Engage with system architects and sub-system owners to define specifications and chip functions
- Perform power, area and performance trade-off analyses of digital designs and architectures
- Apply engineering best practices (e.g. code review, testing, refactoring) to the design and implementation of ASIC blocks
Requirements For Senior Silicon Digital RTL Design Engineer
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog
- 5 years of experience with Intellectual Property (IP) Development or Integration
- Experience with low power design techniques
- Experience with Analog or Mixed Signal designs
- Experience working with highly scaled CMOS processes
- Experience with design-for-test (DFT) flows and methodology
- Experience in scripting languages (Python, TCL, etc.)
- Knowledge of version control systems such as Git
Benefits For Senior Silicon Digital RTL Design Engineer
- Equal opportunity employer
- Accommodation for special needs
- Inclusive work environment
- Medical benefits
- Parental benefits
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