Google's Raxium display group is at the forefront of revolutionary semiconductor materials display technology, specifically focused on microLED-based Display Panel solutions. As a Senior Test Engineer for CMOS Backplane, you'll play a crucial role in developing and optimizing test solutions for next-generation display panels. The position offers a competitive salary range of $147,000-$216,000 plus bonus, equity, and benefits.
The role requires expertise in Silicon, CMOS, and IC test development, with a strong background in hardware and software debugging. You'll work at the intersection of hardware and software, developing custom test solutions and collaborating with various engineering teams. The position demands both technical depth in electrical engineering and the ability to optimize test processes for production environments.
This is an exciting opportunity to join a team with start-up roots and access to state-of-the-art compound semiconductor fab facilities in Silicon Valley. The role offers the chance to work on disruptive display technology that aims to bridge the gap between digital and physical realms in applications such as augmented reality and light-field displays.
Key responsibilities include developing and validating CMOS Backplane test solutions, interfacing with various test equipment, troubleshooting electrical issues, and collaborating with multiple engineering teams. The ideal candidate will have experience with testing software development, Python, SQL databases, and Linux, along with a strong understanding of firmware concepts and electrical engineering fundamentals.
The position offers growth opportunities within Google's innovative display technology division, working on cutting-edge projects that could shape the future of display technology. If you're passionate about hardware engineering, test development, and want to be part of a team pushing the boundaries of display technology, this role provides an excellent opportunity to make a significant impact.