Silicon AI/ML Lead Architect
Description For Silicon AI/ML Lead Architect
Google is seeking a Silicon AI/ML Lead Architect to join their Technical Infrastructure team, focusing on developing custom silicon solutions for AI accelerators in data centers. This role combines hardware architecture expertise with AI/ML technology, working on next-generation data center accelerators that power Google's innovative products.
The position requires deep expertise in micro-architecture design, particularly for ML and graphics IP, with a strong focus on high-performance computing and hardware optimization. You'll be working at the cutting edge of AI hardware development, creating solutions that directly impact Google's data center capabilities and product performance.
As a Lead Architect, you'll collaborate with cross-functional teams spanning software, verification, physical design, and silicon validation. Your work will be crucial in shaping the future of Google's AI infrastructure, requiring both technical depth in hardware design and the ability to work effectively across teams.
The role offers the opportunity to work on challenging technical problems at scale, developing solutions that will power the next generation of Google's AI capabilities. You'll be part of a diverse team that pushes boundaries and innovates in custom silicon solutions, directly contributing to products used by millions of people worldwide.
This position is ideal for someone who combines deep technical expertise in hardware architecture with a passion for AI/ML technologies and a desire to work on large-scale, impactful projects. You'll have the chance to influence the direction of Google's AI hardware infrastructure while working with some of the industry's best minds in silicon design and AI technology.
Responsibilities For Silicon AI/ML Lead Architect
- Evaluate different silicon solutions for executing Google's data center AI accelerator roadmap
- Create high performance hardware/software interfaces
- Collaborate with software, verification, emulation, physical design, packaging, and silicon validation stakeholders
- Own microarchitecture of compute intensive Internet Protocols (IP) and subsystems
- Identify and drive power, performance, and area improvements for the modules owned
Requirements For Silicon AI/ML Lead Architect
- Bachelor's degree in Electrical Engineering or equivalent practical experience
- 10 years of experience in micro-architecture and design of graphics or Machine Learning (ML) Internet Protocols (IP)
- 5 years of experience architecting networking ASICs from specification to production
- Experience developing RTL for ASIC subsystems using SystemVerilog
- Experience in micro-architecture, design, verification, logic synthesis, and timing closure
- Knowledge of arithmetic units, bus architectures, accelerators, or memory hierarchies
- Knowledge of high performance and low power design techniques
- Proficiency in a procedural programming language (C++, Python, Go)
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