Silicon Architecture/Design Engineer, PhD, Early Career
Description For Silicon Architecture/Design Engineer, PhD, Early Career
Google is seeking a Silicon Architecture/Design Engineer to shape the future of AI/ML hardware acceleration, specifically focusing on TPU (Tensor Processing Unit) technology. This role is crucial in driving Google's most demanding AI/ML applications. As part of the Technical Infrastructure team, you'll collaborate with hardware and software architects to design next-generation TPUs, balancing performance, power, features, schedule, and cost.
The position involves working on cutting-edge technology that powers Google's AI infrastructure. You'll be responsible for developing architecture specifications, creating performance models, and working closely with various teams to ensure optimal hardware/software integration. The role requires expertise in both hardware architecture and machine learning, making it a unique opportunity to impact the future of AI computing.
The ideal candidate should have a PhD in a relevant field and experience with accelerator architectures and data center workloads. Strong programming skills in C++, Python, and Verilog are essential, along with familiarity with industry-standard tools like Synopsys and Cadence. Knowledge of high-performance computing, low power design techniques, and machine learning architectures is highly valued.
This position offers the opportunity to work with world-class engineers and researchers, contributing to groundbreaking advancements in AI hardware acceleration. You'll be part of Google's Technical Infrastructure team, which is fundamental to keeping Google's vast product portfolio running efficiently. The role combines deep technical expertise with collaborative teamwork, making it ideal for someone passionate about pushing the boundaries of AI hardware development.
Responsibilities For Silicon Architecture/Design Engineer, PhD, Early Career
- Revolutionize Machine Learning (ML) workload characterization and benchmarking, and propose capabilities and optimizations for next-generation TPUs
- Develop architecture specifications that meet current and future computing requirements for AI/ML roadmap
- Develop architectural and microarchitectural power/performance models, microarchitecture and RTL designs
- Partner with hardware design, software, compiler, Machine Learning (ML) model and research teams for effective hardware/software codesign
- Develop and adopt advanced AI/ML capabilities, drive accelerated and efficient design verification strategies
- Use AI techniques for faster and optimal Physical Design Convergence
Requirements For Silicon Architecture/Design Engineer, PhD, Early Career
- PhD degree in Electronics and Communication Engineering, Electrical Engineering, Computer Engineering or related technical field, or equivalent practical experience
- Experience with accelerator architectures and data center workloads
- Experience in programming languages (e.g., C++, Python, Verilog), Synopsys, Cadence tools
- 2 years of experience post PhD (preferred)
- Experience with performance modeling tools (preferred)
- Knowledge of arithmetic units, bus architectures, accelerators, or memory hierarchies (preferred)
- Knowledge of high performance and low power design techniques (preferred)
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