Silicon Hardware Architecture Modeling Engineer, TPU, Google Cloud
Description For Silicon Hardware Architecture Modeling Engineer, TPU, Google Cloud
Google is seeking a Silicon Hardware Architecture Modeling Engineer for their TPU (Tensor Processing Unit) team within Google Cloud. This role is crucial in shaping the future of AI/ML hardware acceleration at Google. The position involves working on cutting-edge TPU technology that powers Google's most demanding AI/ML applications. As part of a diverse team, you'll be developing custom silicon solutions and contributing to the innovation behind products used by millions worldwide. The role requires expertise in hardware architecture modeling, performance analysis, and optimization, with a focus on ML workload characterization and hardware/software co-design. You'll collaborate with various teams including hardware design, software, compiler, and ML research to define and optimize next-generation TPUs. The position offers an opportunity to work on Google's Technical Infrastructure team, which is fundamental to keeping Google's product portfolio running efficiently. The ideal candidate should have strong experience in computer architecture, software development, and a deep understanding of ML hardware acceleration.
Responsibilities For Silicon Hardware Architecture Modeling Engineer, TPU, Google Cloud
- Work on Machine Learning (ML) workload characterization and benchmarking
- Conduct performance and power analysis and evaluate proposals
- Develop architectural and microarchitectural models to enable quantitative analysis
- Collaborate with partners in hardware design, software, compiler, ML model and research teams for effective hardware/software codesign
- Propose capabilities and optimizations for next-generation Tensor Processing Units (TPU) and chip roadmap
Requirements For Silicon Hardware Architecture Modeling Engineer, TPU, Google Cloud
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience
- 3 years of experience in computer architecture performance analysis and optimization, or a PhD degree in lieu of industry experience
- Experience in developing software systems in C++
- Experience in hardware and software co-design (preferred)
- Experience in analyzing workload performance and creating benchmarks (preferred)
- Experience developing in Python (preferred)
- Experience in applying computer architecture principles to solve problems (preferred)
- Knowledge of processor design or accelerator designs and mapping Machine Learning (ML) models to hardware architectures (preferred)
- Knowledge of design of digital logic at the Register Transfer Level (RTL) using Verilog (preferred)
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