Silicon Security Test and Verification Engineer

Google organizes world's information and makes it universally accessible and useful, combining AI, Software, and Hardware.
Security
Entry-Level Software Engineer
Contact Company
2+ years of experience
AI · Enterprise SaaS

Description For Silicon Security Test and Verification Engineer

Google is seeking a Silicon Security Test and Verification Engineer to join their Hardware Testing Engineering team. This role is crucial in ensuring the reliability of Google's custom-designed machines, which form one of the largest computing infrastructures globally. The position involves working in R&D labs, designing test equipment for prototypes, and developing testing protocols that can be scaled across the global team.

The ideal candidate will have a strong background in electrical engineering with specific expertise in SOC/IP DV and verification methodologies. You'll be working with cutting-edge technology, collaborating closely with design engineers to improve hardware quality and reliability. The role requires expertise in various technical areas including ARM security architecture, verification methodologies, and programming skills.

As part of Google's mission to organize the world's information and make it universally accessible, you'll be contributing to the development of new technologies that combine the best of Google's AI, Software, and Hardware capabilities. The team focuses on creating radically helpful experiences and making computing faster, seamless, and more powerful.

Key responsibilities include collaborating on Silicon OTP fusing and repair flows, debugging at various levels, and working with complex testing environments. You'll need to demonstrate strong technical skills in areas like JTAG/APB/AHB/AXI protocols, scripting languages, and testing tools. The position offers the opportunity to work with state-of-the-art technology while contributing to Google's mission of making people's lives better through technology.

Last updated a day ago

Responsibilities For Silicon Security Test and Verification Engineer

  • Collaborate with internal design teams to define requirements and support Silicon OTP fusing, repair, and provisioning flows
  • Simulate and debug at RTL/Gate level/Timing, ATE/Bench pattern generation with target coverage
  • Work independently with simulators and debug tools including VCS, NCVerilog, and Novas
  • Understand SoC level DV/UVM environment and JTAG/APB/AHB/AXI based protocols
  • Deliver automation flows using scripting languages such as Python, Perl, Skill, and TCL

Requirements For Silicon Security Test and Verification Engineer

Python
  • Bachelor's degree in Electrical Engineering or equivalent practical experience
  • 2 years of experience in SOC/IP DV
  • Experience with verification methodology such as SV and UVM
  • Experience in ARM security architecture
  • Familiarity with SoC level DV/UVM environment
  • Knowledge of JTAG/APB/AHB/AXI based protocols
  • HDL (Verilog/VHDL), HVL (System Verilog, OVM, ARM-C), and SVA experience
  • Knowledge of ATE pattern generation/conversion
  • Ability to write scripts in Perl, Python or bash

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