Silicon Security Test and Verification Engineer
Description For Silicon Security Test and Verification Engineer
Google, a global technology leader, is seeking a Silicon Security Test and Verification Engineer to join their Hardware Testing Engineering team. This role is crucial in ensuring the reliability of Google's custom-designed machines, which form one of the world's largest computing infrastructures. The position involves working in R&D labs, designing test equipment for prototypes, and developing scalable testing protocols.
The role combines hardware security expertise with verification engineering, requiring deep knowledge of SOC/IP DV, verification methodologies, and ARM security architecture. You'll collaborate closely with design teams on Silicon OTP fusing, repair, and provisioning flows, while working with advanced simulators and debug tools.
This is an excellent opportunity for someone passionate about hardware security and verification, offering the chance to work on cutting-edge technology that impacts billions of users. You'll be part of a team that combines Google's strengths in AI, Software, and Hardware to create innovative solutions.
The position offers the opportunity to work with state-of-the-art technology and contribute to Google's mission of organizing the world's information. You'll be involved in ensuring the security and reliability of Google's hardware infrastructure, making computing faster, seamless, and more powerful.
Google provides an inclusive work environment and is committed to equal opportunity, offering a chance to work on meaningful projects that help make people's lives better through technology.
Responsibilities For Silicon Security Test and Verification Engineer
- Collaborate with internal design teams to define requirements and support Silicon OTP fusing, repair, and provisioning flows
- Simulate and debug at RTL/Gate level/Timing, ATE/Bench pattern generation with target coverage
- Work independently with simulators and debug tools including VCS, NCVerilog, and Novas
- Understand SoC level DV/UVM environment and JTAG/APB/AHB/AXI based protocols
- Deliver automation flows using scripting languages such as Python, Perl, Skill, and TCL
Requirements For Silicon Security Test and Verification Engineer
- Bachelor's degree in Electrical Engineering or equivalent practical experience
- 2 years of experience in SOC/IP DV
- Experience with verification methodology such as SV and UVM
- Experience in ARM security architecture
- Knowledge of JTAG/APB/AHB/AXI based protocols
- Experience with HDL (Verilog/VHDL), HVL (System Verilog, OVM, ARM-C), and SVA
- Experience with simulators and debug tools (VCS, NCVerilog, Novas)
- Ability to write scripts in Perl, Python or bash
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