Silicon Security Test and Verification Engineer

Google organizes world's information and makes it universally accessible and useful through AI, Software, and Hardware.
Security
Entry-Level Software Engineer
Contact Company
2+ years of experience
Enterprise SaaS

Description For Silicon Security Test and Verification Engineer

Google is seeking a Silicon Security Test and Verification Engineer to join their Hardware Testing Engineering team. This role is crucial in ensuring the reliability of Google's custom-designed machines, which form one of the largest computing infrastructures globally. The position involves working in R&D labs, designing test equipment for prototypes, and developing testing protocols that scale across the global team.

As a Silicon Security Test and Verification Engineer, you'll collaborate closely with design engineers to improve hardware quality and reliability to meet Google's high standards. The role requires expertise in SOC/IP DV, verification methodologies, and ARM security architecture. You'll be working with various tools and technologies including simulators, debug tools, and multiple programming languages.

The ideal candidate should have a strong background in Electrical Engineering with at least 2 years of experience in SOC/IP DV. Knowledge of verification methodologies, ARM security architecture, and various protocols is essential. The role offers the opportunity to work with cutting-edge technology and contribute to Google's mission of organizing the world's information.

You'll be part of a team that combines the best of Google AI, Software, and Hardware to create innovative solutions. The position involves collaborating with internal teams, working on complex technical challenges, and delivering automation flows. This is an excellent opportunity for someone passionate about hardware testing and verification who wants to make a significant impact on Google's infrastructure.

Last updated 7 days ago

Responsibilities For Silicon Security Test and Verification Engineer

  • Collaborate with internal design teams to define requirements and support Silicon OTP fusing, repair, and provisioning flows
  • Simulate and debug at RTL/Gate level/Timing, ATE/Bench pattern generation with target coverage
  • Work independently with simulators and debug tools including VCS, NCVerilog, and Novas
  • Understand SoC level DV/UVM environment and JTAG/APB/AHB/AXI based protocols
  • Deliver automation flows using scripting languages such as Python, Perl, Skill, and TCL

Requirements For Silicon Security Test and Verification Engineer

Python
  • Bachelor's degree in Electrical Engineering or equivalent practical experience
  • 2 years of experience in SOC/IP DV
  • Experience with verification methodology such as SV and UVM
  • Experience in ARM security architecture
  • Familiarity with SoC level DV/UVM environment
  • Knowledge of JTAG/APB/AHB/AXI based protocols
  • HDL (Verilog/VHDL), HVL (System Verilog, OVM, ARM-C), and SVA experience
  • Knowledge of ATE pattern generation/conversion
  • Ability to write scripts in Perl, Python or bash

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