Google is seeking a Senior Physical Design Engineer for their TPU team within Google Cloud. This role is crucial in developing cutting-edge SoCs used to accelerate machine learning computation in data centers. As part of Google's Technical Infrastructure team, you'll work on custom silicon solutions that power Google's direct-to-consumer products.
The position involves collaborating with various teams including architecture, verification, power and performance, and physical design to deliver high-quality designs for next-generation data center accelerators. You'll be tasked with solving technical problems through innovative micro-architecture and practical logic solutions, while considering complexity, performance, power, and area constraints.
The Technical Infrastructure team at Google is responsible for building and maintaining the architecture that supports all of Google's products. They take pride in being the "engineers' engineers" and are committed to maintaining Google's networks to ensure optimal user experience.
This role offers the opportunity to work on hardware that impacts millions of users worldwide, contributing to Google's next generation of hardware experiences. You'll be part of a diverse team that pushes boundaries in custom silicon development, focusing on unparalleled performance, efficiency, and integration.
The ideal candidate should have strong experience in advanced design, particularly in areas such as clock/voltage domain crossing, Design for Testing (DFT), and low power designs. Knowledge of System on Chip (SoC) cycles and high-performance designs is essential. Additional expertise in System Verilog, TCL scripting, and VLSI design would be advantageous.