Silicon SoC Design/Integration Engineer, TPU, Google Cloud
Description For Silicon SoC Design/Integration Engineer, TPU, Google Cloud
Google is seeking a Silicon SoC Design/Integration Engineer for their TPU (Tensor Processing Unit) team within Google Cloud. This role focuses on shaping the future of AI/ML hardware acceleration through cutting-edge TPU technology that powers Google's most demanding AI/ML applications. The position involves working with custom silicon solutions for TPU development, requiring expertise in ASIC development, design verification, and SoC integration.
The role is integral to developing ASICs that accelerate machine learning computation in data centers. You'll collaborate with cross-functional teams in architecture, verification, power and performance, and physical design to deliver high-quality designs for next-generation data center accelerators. The position requires innovative problem-solving skills in micro-architecture and logic solutions, with a focus on optimizing complexity, performance, power, and area.
As part of Google's Technical Infrastructure team, you'll contribute to the architecture that supports Google's entire product portfolio. The team is responsible for developing and maintaining data centers and building next-generation Google platforms. The role offers the opportunity to work on cutting-edge technology while being part of a team that ensures Google's users have the best and fastest experience possible.
This position combines deep technical expertise in hardware design with the excitement of working on AI/ML infrastructure at scale. It's an opportunity to impact the future of machine learning acceleration while working with some of the most advanced computing systems in the industry.
Responsibilities For Silicon SoC Design/Integration Engineer, TPU, Google Cloud
- Own microarchitecture, implementation, and integration of SoC Chassis and subsystems
- Perform quality check flows (e.g., Lint, CDC, RDC, VCLP)
- Drive design methodology, libraries, debug, code review in coordination with other IPs Design Verification (DV) teams and physical design teams
- Identify and drive power, performance, and area improvements for the domains owned
Requirements For Silicon SoC Design/Integration Engineer, TPU, Google Cloud
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience
- 8 years of experience in ASIC development with Verilog/SystemVerilog, VHDL
- Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT)
- Experience in one or more SoC integration domains and flows (e.g., clocking, debug, fabrics, security, or low power methodologies)
Benefits For Silicon SoC Design/Integration Engineer, TPU, Google Cloud
- Equal employment opportunity
- Inclusive work environment
- Comprehensive medical benefits
- Parental leave
- Accommodation for special needs
