Silicon SoC Design/Integration Engineer, TPU, Google Cloud
Description For Silicon SoC Design/Integration Engineer, TPU, Google Cloud
Google is seeking a Silicon SoC Design/Integration Engineer to join their TPU (Tensor Processing Unit) team in developing cutting-edge AI/ML hardware acceleration technology. This role offers an exciting opportunity to shape the future of AI hardware, working on custom silicon solutions that power Google's most demanding AI/ML applications.
The position involves working with a diverse team to develop ASICs used to accelerate machine learning computation in data centers. You'll collaborate across multiple teams including architecture, verification, power and performance, and physical design to deliver high-quality designs for next-generation data center accelerators.
As part of the Technical Infrastructure team, you'll be instrumental in building the architecture that keeps Google's products running. The role requires expertise in ASIC development, SoC integration, and hardware design verification. You'll be solving complex technical challenges, developing innovative micro-architecture solutions, and evaluating design options while considering complexity, performance, power, and area constraints.
This is an excellent opportunity for experienced hardware engineers who want to make a significant impact on Google's AI infrastructure. You'll be working with cutting-edge technology, collaborating with talented engineers, and contributing to products used by millions of people worldwide. The role offers the chance to work on challenging technical problems while being part of Google's mission to advance AI technology.
The position requires strong technical skills in ASIC development, verification, and SoC integration, combined with the ability to collaborate effectively across teams. You'll be joining a company known for its innovative culture and commitment to pushing technological boundaries.
Responsibilities For Silicon SoC Design/Integration Engineer, TPU, Google Cloud
- Own microarchitecture, implementation, and integration of SoC Chassis and subsystems
- Perform quality check flows (e.g., Lint, CDC, RDC, VCLP)
- Drive design methodology, libraries, debug, code review in coordination with other IPs Design Verification teams and physical design teams
- Identify and drive power, performance, and area improvements for the domains owned
Requirements For Silicon SoC Design/Integration Engineer, TPU, Google Cloud
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience
- 8 years of experience in ASIC development with Verilog/SystemVerilog, VHDL
- Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT)
- Experience in one or more SoC integration domains and flows
- Experience with scripting languages (Python or Perl) preferred
- Knowledge of bus architectures, processor design, accelerators, or memory hierarchies preferred
- Knowledge of high performance and low power design techniques preferred
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