Silicon SoC RTL Design/Integration Engineer
Description For Silicon SoC RTL Design/Integration Engineer
Google Cloud is seeking a Silicon SoC RTL Design/Integration Engineer to join their Hardware Testing Engineering team. This role is crucial in developing and maintaining Google's custom-designed machines that power one of the world's largest computing infrastructures.
As a member of the Digital Design team, you'll be instrumental in crafting architecture for current and future ASIC projects, focusing on networking solutions. You'll collaborate closely with verification and validation teams to ensure proper feature testing, while working with Google product teams to align microarchitecture designs with their objectives.
The position requires expertise in ASIC development, networking protocols, and design verification. You'll be working with cutting-edge technology, contributing to the development of next-generation hardware that powers Google's vast infrastructure. The role offers the opportunity to work with various teams, from physical design to manufacturing, ensuring comprehensive solution delivery.
Google's Technical Infrastructure team takes pride in being the engineers' engineers, focusing on building and maintaining data centers and developing next-generation Google platforms. The team is responsible for keeping networks running optimally, ensuring users have the best possible experience.
This is an excellent opportunity for someone passionate about hardware design and testing, with a strong background in electrical engineering or computer science. You'll be part of a team that directly impacts Google's product portfolio and infrastructure reliability. The role offers the chance to work with state-of-the-art technology while collaborating with various engineering teams to drive innovation in hardware design and testing.
The position comes with Google's commitment to fostering an inclusive work environment and offers the opportunity to work on projects that affect millions of users worldwide. If you're excited about developing cutting-edge hardware solutions and want to be part of a team that pushes technological boundaries, this role at Google Cloud would be an excellent fit.
Responsibilities For Silicon SoC RTL Design/Integration Engineer
- Define the microarchitecture of Subsystems or SoCs and work with the team to deliver a quality, schedule compliant design
- Manage the architecture and microarchitecture of current and future generations of ASIC
- Work closely with Physical Design teams to ensure success. Consolidate demands from Verification, Manufacturing and Product teams
- Help drive internal and external users to vet architecture ideas
Requirements For Silicon SoC RTL Design/Integration Engineer
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience
- 1 year of experience in ASIC development with Verilog/SystemVerilog, VHDL, or Chisel
- Experience in networking, including working with Ethernet, TCP/IP, buffering, queueing, and scheduling
- Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT)
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