Silicon Test Engineer, SoC, Platforms
Description For Silicon Test Engineer, SoC, Platforms
Google is seeking a Silicon Test Engineer to join their Technical Infrastructure team, focusing on developing and implementing comprehensive test solutions for System on Chips (SoC) that power their advanced data centers. This role is crucial in shaping the future of AI/ML hardware acceleration, particularly working with TPU (Tensor Processing Unit) technology.
The position involves working with cutting-edge technology and requires expertise in test engineering and product engineering. You'll be responsible for developing and deploying test solutions using Automatic Test Equipment (ATE) for both New Product Introduction (NPI) and High Volume Manufacturing (HVM) at wafer fabs and Outsourced Assembly and Tests (OSAT).
Key responsibilities include ATE test program development, IP-level test development for DFT structural tests, and supporting chip-level DFT test development. You'll work closely with cross-functional teams to ensure optimal test coverage and high-quality SoCs. The role also involves developing automation methodologies and supporting internal tools for test program generation.
The ideal candidate should have at least 5 years of experience in test engineering or product engineering, with a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. Experience with ASIC or SoC DFT test development is essential.
Google offers a competitive compensation package including a base salary range of $150,000-$223,000, plus bonus, equity, and comprehensive benefits. This is an opportunity to work with world-class engineers and contribute to technology that impacts millions of users worldwide while being part of a diverse team that pushes boundaries in custom silicon solutions.
Responsibilities For Silicon Test Engineer, SoC, Platforms
- Participate in ATE test program development for High Volume Manufacturing and Characterization, work with ATE Vendors and internal cross-functional teams
- Own IP-level test development for Design for testing (DFT) structural tests, functional tests, or eFuse programming
- Support Chip-level DFT test development for Automatic Test Pattern Generation (ATPG) Scan, Memory Built-In Self Test (MBIST), logic and memory diagnostics, logic redundancy analysis, or memory repair
- Participate in developing and executing strategies for SoC Product NPI, bring-up, verification, characterization, and qualification support
- Back-stop support for production, including test program upgrade and release, volume data analytics, test time reduction and yield improvement, and Return Materials/Merchandise Authorization (RMA) analysis
Requirements For Silicon Test Engineer, SoC, Platforms
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or in a related field, or equivalent practical experience
- 5 years of experience in test engineering or product engineering
- Experience in Application-Specific Integrated Circuit (ASIC) or SoC DFT test development, bring-up, or debug for NPI prototypes or High Volume Manufacturing
Benefits For Silicon Test Engineer, SoC, Platforms
- bonus
- equity
- benefits
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