SoC and IP Design Engineer, Google Cloud
Description For SoC and IP Design Engineer, Google Cloud
Google Cloud is seeking a skilled SoC and IP Design Engineer to join their Technical Infrastructure team. This role focuses on developing custom silicon solutions that power Google's direct-to-consumer products. As part of the team, you'll work on cutting-edge hardware architecture, contributing to the innovation behind products used by millions worldwide.
The position requires expertise in digital logic design, RTL development, and system-on-chip architecture. You'll be responsible for defining SoC/block level design documents, performing RTL development using Verilog and SystemVerilog, and participating in various aspects of the design and verification process. The role involves working with synthesis, timing/power closure, and ASIC silicon bring-up.
The ideal candidate should have strong experience with logic synthesis techniques, design verification, and quality tools. Knowledge of high-performance and low-power design techniques is valued, along with expertise in domains such as PCIe, UCIe, DDR, AXI, and ARM processors. Scripting skills in Python or Perl are preferred.
Working at Google offers the opportunity to be part of a diverse team that pushes boundaries and develops innovative solutions. You'll contribute to the architecture that powers Google's extensive product portfolio, ensuring optimal performance and efficiency. The role provides a unique chance to work with cutting-edge technology while collaborating with multi-disciplined and multi-site teams.
The position is based in either Tel Aviv or Haifa, Israel, offering the chance to work with Google's global technical infrastructure team. This is an excellent opportunity for someone passionate about hardware design and looking to make a significant impact on Google's next generation of products.
Responsibilities For SoC and IP Design Engineer, Google Cloud
- Define the SoC/block level design document such as interface protocol, block diagram, transaction flow, pipeline etc.
- Perform Register-Transfer Level (RTL) development (e.g., coding and debug in Verilog, SystemVerilog), function/performance simulation debug and Lint/CDC/FV/UPF checks
- Participate in synthesis, timing/power closure and ASIC silicon bring-up
- Participate in test plan and coverage analysis of the block and SoC level verification
- Communicate and work with multi-disciplined and multi-site teams
Requirements For SoC and IP Design Engineer, Google Cloud
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog
- Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques
- Experience in logic design and debug with Design Verification (DV)
- Experience with design sign-off and quality tools (e.g., Lint, CDC, etc.)
Jobs Related To Google SoC and IP Design Engineer, Google Cloud
