SoC RTL Design Engineer
Description For SoC RTL Design Engineer
Google is seeking a talented SoC RTL Design Engineer to join their Devices & Services team, focusing on developing custom silicon solutions for Google's direct-to-consumer products. This role combines hardware expertise with cutting-edge technology to create innovative solutions that power Google's next-generation hardware experiences.
As a SoC RTL Design Engineer, you'll be instrumental in defining and implementing microarchitecture for Subsystems and SoCs, working with Verilog/SystemVerilog for RTL coding. You'll collaborate with cross-functional teams including Architecture, Verification, Design for Test, Physical Design, and Software teams to ensure optimal design decisions and outcomes.
The position requires strong technical expertise in RTL coding, system architecture, and verification methodologies. You'll be working on projects that directly impact millions of users worldwide, contributing to Google's mission of creating radically helpful experiences through the combination of AI, Software, and Hardware.
The role offers an opportunity to work with state-of-the-art technology in areas such as Process Cores, Interconnects, Debug and Trace, Security, Interrupts, and Power/Voltage Domains. You'll be part of a diverse team that pushes boundaries and innovates in the hardware space, with the backing of Google's extensive resources and technical expertise.
This is an excellent opportunity for someone with a strong background in electrical engineering or computer science who wants to make a significant impact in the development of custom silicon solutions. You'll be at the forefront of hardware innovation, working on products that combine performance, efficiency, and integration in novel ways.
The position is based in Bengaluru, India, and offers the chance to work with a global team while contributing to products that are used and loved by millions of people worldwide. If you're passionate about hardware design and want to be part of shaping the future of Google's hardware experiences, this role provides the perfect platform to make your mark in the industry.
Responsibilities For SoC RTL Design Engineer
- Define the microarchitecture of Subsystems or SoCs and work with the team to deliver a quality, schedule compliant design
- Perform RTL coding for Subsystems/SoC integration, function/performance simulation debug, Lint/CDC/FV/UPF checks
- Work closely with the cross-functional team of Architecture, Verification, Design for Test, Physical Design, and Software teams to make design decisions
- Define the block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc
Requirements For SoC RTL Design Engineer
- Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience
- 3 years of experience in RTL coding using Verilog or Systemverilog language
- Experience in STA closure, DV test-plan review, and coverage analysis of the sub-system and chip level verification
- English proficiency is required
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