TPU Compute RTL Design Engineer

Google is seeking a TPU Compute RTL Design Engineer to join their Technical Infrastructure team. This role focuses on developing Application-specific integrated circuits (ASICs) used to accelerate computation in data centers. As part of the team developing custom silicon solutions, you'll be instrumental in powering Google's direct-to-consumer products. The position involves working on project definition, design, and implementation of next-generation data center accelerators.

The role requires expertise in digital design using SystemVerilog RTL and deep understanding of computer architecture principles. You'll collaborate with cross-functional teams including software, architecture, and validation teams to ensure optimal design implementation. The position offers competitive compensation including base salary, bonus, equity, and comprehensive benefits.

The Technical Infrastructure team is crucial in maintaining Google's vast network of data centers and platforms, ensuring users have the best and fastest experience possible. This team takes pride in being the engineers' engineers, working behind the scenes to make Google's entire product portfolio possible.

This is an excellent opportunity for someone with strong technical skills in hardware design and computer architecture who wants to work on cutting-edge technology that impacts millions of users worldwide. The role offers the chance to work with state-of-the-art tools and technologies while contributing to the next generation of Google's hardware infrastructure.

Working at Google also means being part of a culture that values diversity, equality, and inclusion. The company is committed to building a workforce representative of its users and creating an environment where all employees can thrive.