Design Verification (DV) Engineer

Hudson River Trading (HRT) is at the forefront of algorithmic trading, combining cutting-edge technology with scientific trading approaches. We're seeking a Design Verification (DV) Engineer to join our Hardware team, which creates high-performance compute engines using FPGA and ASIC technology for low-latency trading decisions.

As a DV Engineer, you'll be integral to ensuring the correctness and robustness of our critical hardware in a fast-paced, real-time environment. You'll work with a team that's actively rethinking and redesigning the status quo in hardware verification, including maintaining popular open-source projects like Slang, Verilator, and Cocotb.

The role combines technical expertise in hardware verification with innovative problem-solving. You'll create testbenches, write verification plans, and collaborate directly with designers. We're looking for someone who's not just an excellent tester but also a toolsmith who understands the EDA landscape.

At HRT, we value diversity and embrace a culture of togetherness that extends beyond the office. We're a community of self-starters from various disciplines - mathematics, computer science, physics, engineering, media, and tech. No financial experience is necessary, as we focus on finding the best talent and bringing them together to do great work in an environment where everyone is valued.

The position offers competitive compensation, including a base salary range of $175,000 to $225,000, plus potential sign-on and performance bonuses, and comprehensive benefits. Join us in pushing the boundaries of hardware verification in the exciting world of algorithmic trading.