Hudson River Trading (HRT) is seeking a Design Verification (DV) Engineer to join their Hardware team, which creates high-performance compute engines using FPGA and ASIC technology for low-latency trading decisions. The role focuses on building and maintaining sophisticated verification environments for complex hardware designs.
As a DV Engineer, you'll be part of an innovative team that's integral to HRT's trading success. You'll work with cutting-edge technology, creating testbenches and verification environments for complex HDL implementations. The team is actively involved in open-source projects like Slang, Verilator, and Cocotb, offering opportunities to contribute to the broader hardware verification community.
The position requires strong technical skills in hardware verification, including experience with SystemVerilog, UVM, and Python. You'll work in a fast-paced, real-time environment where your work directly impacts the company's trading infrastructure. The role offers competitive compensation and the opportunity to work with a diverse, collaborative team that values innovation and technical excellence.
HRT provides a unique culture that combines technical sophistication with a collaborative, friendly atmosphere. The company values diverse perspectives and creates an environment where great ideas are celebrated regardless of their source. Join a team that's pushing the boundaries of hardware verification while working on critical systems that drive modern financial markets.