FPGA Verification Engineer

Hudson River Trading (HRT) is seeking an experienced FPGA Verification Engineer to join their hardware team. This role is crucial in creating ultra-low latency products to support trading on global markets. The ideal candidate should be skilled at writing testbenches and building verification environments for complex hardware.

Key responsibilities include:

• Creating testbenches and tests for HRT's FPGA platform
• Writing detailed verification plans
• Quickly root-causing RTL bugs
• Collaborating with designers for rapid bringup of new projects
• Managing regression and continuous integration infrastructure
• Developing and improving open-source and internal tools

Qualifications:

• Excellent debug and analytical skills
• Strong background (4+ years) in RTL functional verification for FPGA or ASIC
• Experience with code and functional coverage collection/analysis
• Experience with Python and comfort in a Linux environment
• Familiarity with Verilator and/or Cocotb preferred
• Experience with networking protocols preferred
• C++ experience is a plus
• Bachelor's degree in Computer or Electrical Engineering or related field

HRT offers a competitive compensation package, including an annual base salary range of $150,000 to $200,000, potential sign-on and performance bonuses, and comprehensive benefits. The company values diversity and maintains a culture of togetherness, welcoming expertise from various disciplines and fostering innovation in algorithmic trading.

Join HRT to be part of a dynamic team at the forefront of automation and financial technology, where great ideas are celebrated and everyone's contribution is valued.