ASIC Architecture and Performance Modeling Manager
Description For ASIC Architecture and Performance Modeling Manager
Meta is seeking an ASIC Architecture and Performance Modeling Manager to lead a team responsible for defining silicon architecture and modeling various processing blocks in multiple SOCs. The ideal candidate will be a hands-on technical manager with experience in building C/C++ based simulators for complex ASICs. We seek a consensus-driven leader with cross-functional partnership experience and a proven track record in defining SOC Architecture, as well as building virtual platforms for functional and performance analysis of SoCs at different levels of abstraction.
Key responsibilities include:
- Managing an ASIC Architecture team
- Driving the development of C/C++/SystemC simulation models
- Partnering with cross-functional teams
- Hiring, training, and supporting a team of ASIC engineers
- Contributing to and analyzing SOWs from vendors
- Managing external development partners, suppliers, and vendors
Minimum qualifications:
- Proven hands-on programming experience in C/C++ or other object-oriented programming languages
- B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or related technical fields
- 6+ years of experience in ASIC architecture, algorithm development, ASIC firmware, or Hardware Modeling
- 2+ years of experience as a People Manager
- Clear understanding of complexities in virtual prototype models for complex ASICs
Preferred qualifications:
- Experience in driving Silicon Architecture
- Experience managing and delivering C/C++ cycle-accurate, bit-accurate, and transaction-accurate models
- Knowledge of machine learning concepts and/or other machine learning development frameworks
Meta offers a competitive compensation package, including a base salary range of $173,000/year to $249,000/year, plus bonus, equity, and benefits. Join us in shaping the future of social technology and building experiences that go beyond the constraints of screens and physical limitations.
Responsibilities For ASIC Architecture and Performance Modeling Manager
- Manage an ASIC Architecture team responsible for the definition of silicon architecture and the modeling of various processing blocks in multiple SOCs
- Drive the development of C/C++/SystemC simulation models for silicon architecture and algorithm evaluation, performance analysis and hardware verification
- Partner with cross-functional teams such as HW/SW Co-design, RTL design, verification, emulation, post silicon validation, firmware and software development
- Identify candidates, hire, schedule, support and train a team of ASIC engineers
- Contribute to, analyze, review SOWs from vendors, supporting documentation, requirements that meet the needs of internal customers
- Partner with technical program management and supply chain team members to manage external development partners, suppliers and vendors
Requirements For ASIC Architecture and Performance Modeling Manager
- Proven hands-on programming experience in C/C++ or any other object oriented programming languages
- B.S. or M.S. degree in Computer Engineering or Electrical Engineering or related technical fields
- 6+ years of experience working in an ASIC architecture, algorithm development, ASIC firmware or Hardware Modeling team
- 2+ years of experience as a People Manager
- Clear understanding of complexities involved in the development, debug and use of virtual prototype models for complex ASICs, and tradeoffs in speed v/s accuracy of such models
- Experience working across multiple projects and adjusting priorities in partnership with stakeholders
Benefits For ASIC Architecture and Performance Modeling Manager
- 401k
- Equity
- Medical Insurance
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