ASIC Engineer, Design

Meta builds technologies that help people connect, find communities, and grow businesses through platforms like Facebook, Instagram, WhatsApp, and AR/VR experiences.
$80,000 - $120,000
Hardware
Entry-Level Software Engineer
In-Person
5,000+ Employees
AI · Enterprise SaaS

Description For ASIC Engineer, Design

Meta is seeking an ASIC Engineer to join their Infrastructure organization, focusing on building cutting-edge ASICs for machine learning, video transcoding, and network acceleration. This role is crucial in developing hardware accelerators that power Meta's massive data center infrastructure supporting Facebook, Instagram, and WhatsApp.

As an ASIC Engineer, you'll be an integral part of a team building accelerators for top workloads, enabling efficient data center scaling. You'll collaborate with experts in video transcode, AI/ML, and other technologies to evaluate algorithms, develop functional and performance models, and architect state-of-the-art hardware accelerator ASICs.

The position offers unique opportunities to work on "Green" data center accelerators alongside expert engineers. You'll be involved in various aspects of ASIC development, from micro-architecture and RTL design to verification and post-Silicon validation. The role requires strong technical fundamentals in computer architecture and logic design, with hands-on experience in RTL development.

Meta's Infrastructure organization is responsible for building and maintaining the data centers that host all of their services. This position offers the chance to work at the intersection of hardware and software, contributing to the foundation of Meta's rapidly scaling infrastructure. The role combines technical depth with the opportunity to impact billions of users through Meta's various platforms.

Preferred candidates will have or be pursuing a Master's degree in relevant fields, with experience in data path development, HLS, and high-performance computing. The position also values expertise in technical tools like Lint, CDC, Synthesis, and Power Optimization, along with scripting capabilities in Python or Perl.

Last updated 8 days ago

Responsibilities For ASIC Engineer, Design

  • Participate in Micro-architecture, Design, and Verification reviews and provide feedback
  • Design and develop RTL or HLS code for some of the IPs
  • Analyze designs and enhance PPA (Power, Performance, Area)
  • Support and develop Verification Infrastructure, analyze and improve Verification Coverage
  • Support Simulation accelerators and post-Silicon validation

Requirements For ASIC Engineer, Design

Python
  • Bachelor's degree in Computer Science, Computer Engineering, Electronics Engineering, or relevant technical field
  • Exposure to Micro-architecture development
  • Exposure to RTL development using Verilog, System Verilog or HLS
  • Knowledge of Computer Architecture and Logic Design fundamentals
  • Must obtain work authorization in country of employment

Benefits For ASIC Engineer, Design

Visa Sponsorship
  • Work authorization support

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