ASIC Engineer, Design
Description For ASIC Engineer, Design
Meta is seeking ASIC Design Engineers to join their Infrastructure organization, focusing on building cutting-edge machine learning ASICs for world-class Inference and Training performance. This role is perfect for talented individuals with deep experience in SoC and IP development for data center applications.
The position offers an opportunity to work on advanced silicon development projects, combining micro-architecture development with RTL implementation. You'll be responsible for critical aspects of ASIC design, from initial architecture to final implementation, working with state-of-the-art tools and methodologies.
As an ASIC Engineer at Meta, you'll collaborate with cross-functional teams, including verification, emulation, and implementation teams, to deliver high-performance solutions. The role offers competitive compensation ($114,000-$166,000/year) plus bonus and equity, reflecting Meta's commitment to attracting top talent.
Meta's work environment promotes innovation and technical excellence, with opportunities to impact billions of users worldwide. The company's focus on advancing beyond traditional digital connections into augmented and virtual reality makes this an exciting time to join their hardware development team.
This position is ideal for candidates who are passionate about pushing the boundaries of ASIC design and want to contribute to the next evolution of social technology infrastructure. Join Meta to help shape the future of hardware development for social connection technologies.
Responsibilities For ASIC Engineer, Design
- Micro-architecture development
- RTL development using Verilog, System Verilog and HLS
- Lint, CDC, Synthesis, & Power Optimization
- Soft and hard IP identification, selection and integration
- Collaboration with verification and emulation teams in test plan development and debug
- Collaboration with implementation team to close the design on timing and power
Requirements For ASIC Engineer, Design
- 3+ years of silicon development experience
- Experience with Verilog or System Verilog
- Experience in Micro-architecture and RTL development for complex control and data path IPs, or Experience in SoC Micro-architecture, Design and Integration, or Implementation, Power methodology development
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
Benefits For ASIC Engineer, Design
- bonus
- equity
- benefits
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