ASIC Engineer, Design

Meta builds technologies that help people connect, find communities, and grow businesses through social platforms like Facebook, Instagram, WhatsApp, and immersive AR/VR experiences.
$114,000 - $166,000
Embedded
Mid-Level Software Engineer
In-Person
5,000+ Employees
3+ years of experience
AI · Enterprise SaaS

Description For ASIC Engineer, Design

Meta is seeking an ASIC Design Engineer to join their Infrastructure organization, focusing on developing cutting-edge machine learning ASICs for world-class Inference and Training performance. This role is crucial in building complex SoC and IP solutions for data center applications. The position offers a competitive compensation package ranging from $114,000 to $166,000 annually, plus bonus, equity, and benefits.

The ideal candidate will have deep experience in silicon development, particularly in areas such as micro-architecture development, RTL design, and system integration. You'll be working with technologies like Verilog and System Verilog, handling everything from initial design to power optimization and timing closure. This role requires strong collaborative skills as you'll be working closely with verification, emulation, and implementation teams.

Meta's mission involves connecting people and building communities through various platforms including Facebook, Instagram, and WhatsApp. The company is also pushing boundaries in AR/VR technology, making this an exciting opportunity to work on next-generation hardware that will shape the future of social technology. The position offers the chance to work with cutting-edge AI infrastructure while being part of a team that's defining the future of digital connection.

As part of Meta's Infrastructure team, you'll be at the forefront of developing hardware solutions that power AI and machine learning capabilities across Meta's family of apps and services. This role provides an excellent opportunity for growth and impact in a company that's continuously pushing the boundaries of technology and social connection.

Last updated 17 hours ago

Responsibilities For ASIC Engineer, Design

  • Micro-architecture development
  • RTL development using Verilog, System Verilog and HLS
  • Lint, CDC, Synthesis, & Power Optimization
  • Soft and hard IP identification, selection and integration
  • Collaboration with verification and emulation teams in test plan development and debug
  • Collaboration with implementation team to close the design on timing and power

Requirements For ASIC Engineer, Design

  • 3+ years of silicon development experience
  • Experience with Verilog or System Verilog
  • Experience in Micro-architecture and RTL development for complex control and data path IPs, or Experience in SoC Micro-architecture, Design and Integration, or Implementation, Power methodology development
  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience

Benefits For ASIC Engineer, Design

Equity
Medical Insurance
  • Base salary
  • Bonus
  • Equity
  • Medical benefits

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